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Manufacture of semiconductor device
其他题名Manufacture of semiconductor device
ISODA YOICHI
1988-08-17
专利权人NEC CORP
公开日期1988-08-17
授权国家日本
专利类型发明申请
摘要PURPOSE:To increase the tolerance on the displacement at the alignment exposure during a necessary photolithographic process by a method wherein an electrode is formed selectively on the top of a mesa. CONSTITUTION:While a first mask 12 used for a mesa etching process of a semiconductor substrate is kept as it is, an insulating film 7 for current constriction use is applied to the whole surface of the substrate; after that, a second mask 13, composed of a photoresist, which has an extremely narrow opening 9 as compared with the width of the top part is formed. After the insulating film 7 at the opening has been removed by dry etching or chemical etching by making use of the second mask 13, the chemical etching process is continued further; due to the difference in the chemical etching speed between the first mask 12 and the insulating film 7, an undercut of the first mask 12 proceeds at the top of the mesa from the edge of the opening. When the etching process reaches the edge at the top of the mesa, it is stopped; simultaneously with this stop, the insulating film 7 at the top of the mesa can be removed due to the big undercut. By this setup, it is possible to prevent the manufacturing yield rate from being lowered by the displacement.
其他摘要目的:通过一种选择性地在台面顶部形成电极的方法,在必要的光刻工艺中增加对准曝光位移的容差。组成:当用于半导体基板的台面蚀刻工艺的第一掩模12保持原样时,用于电流限制的绝缘膜7应用于基板的整个表面;之后,形成由光致抗蚀剂构成的第二掩模13,其与顶部的宽度相比具有极窄的开口9。在利用第二掩模13通过干蚀刻或化学蚀刻去除开口处的绝缘膜7之后,继续进行化学蚀刻处理;由于第一掩模12和绝缘膜7之间的化学蚀刻速度的差异,第一掩模12的底切在开口的边缘处在台面的顶部处进行。当蚀刻过程到达台面顶部的边缘时,它停止;在该停止的同时,由于大的底切,可以去除台面顶部的绝缘膜7。通过这种设置,可以防止制造成品率因位移而降低。
申请日期1987-02-13
专利号JP1988198393A
专利状态失效
申请号JP1987031260
公开(公告)号JP1988198393A
IPC 分类号H01L21/306 | H01S5/00 | H01S3/18
专利代理人-
代理机构-
文献类型专利
条目标识符http://ir.opt.ac.cn/handle/181661/84626
专题半导体激光器专利数据库
作者单位NEC CORP
推荐引用方式
GB/T 7714
ISODA YOICHI. Manufacture of semiconductor device. JP1988198393A[P]. 1988-08-17.
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