Xi'an Institute of Optics and Precision Mechanics,CAS
Silicon Heat-Dissipation Package For Compact Electronic Devices | |
其他题名 | Silicon Heat-Dissipation Package For Compact Electronic Devices |
KIM, GERALD HO | |
2017-05-11 | |
专利权人 | KIM, GERALD HO |
公开日期 | 2017-05-11 |
授权国家 | 美国 |
专利类型 | 发明申请 |
摘要 | Embodiments of a silicon heat-dissipation package for compact electronic devices are described. In one aspect, a device includes first and second silicon cover plates. The first silicon cover plate has a first primary side and a second primary side opposite the first primary side thereof. The second silicon cover plate has a first primary side and a second primary side opposite the first primary side thereof. The first primary side of the second silicon cover plate includes an indentation configured to accommodate an electronic device therein. The first primary side of the second silicon cover plate is configured to mate with the second primary side of the first silicon cover plate when the first silicon cover plate and the second silicon cover plate are joined together with the electronic device sandwiched therebetween. |
其他摘要 | 描述了用于紧凑型电子设备的硅散热封装的实施例。在一个方面,一种器件包括第一和第二硅盖板。第一硅盖板具有第一初级侧和与其第一初级侧相对的第二初级侧。第二硅盖板具有第一初级侧和与其第一初级侧相对的第二初级侧。第二硅盖板的第一初级侧包括凹口,该凹口构造成在其中容纳电子器件。第二硅盖板的第一初级侧配置成当第一硅盖板和第二硅盖板通过夹在其间的电子器件连接在一起时与第一硅盖板的第二初级侧配合。 |
主权项 | A method, comprising: forming features of one or more first silicon cover plates on a first silicon wafer; forming features of one or more second silicon cover plates on a second silicon wafer; forming features of one or more first silicon heat sinks on a third silicon wafer; forming features of one or more second silicon heat sinks on a fourth silicon wafer;joining the first, the second, the third, and the fourth silicon wafers into a stack of wafers with one or more electronic devices sandwiched between the first silicon wafer and the second silicon wafer, such that: the first and the second wafers are sandwiched between the third and the fourth wafers, the first wafer is adjacent the fourth wafer, the second wafer is adjacent the third wafer, the one or more first silicon cover plates, the one or more second silicon cover plates, the one or more first silicon heat sinks, and the one or more second silicon heat sinks are aligned with each other, and each of the one or more electronic devices is sandwiched between a respective one of the first silicon cover plates and a respective one of the second silicon cover plates; and dicing the stack of wafers to form one or more silicon heat-dissipation packages each of which having a respective one of the one or more electronic devices embedded therein. |
申请日期 | 2017-01-19 |
专利号 | US20170133240A1 |
专利状态 | 失效 |
申请号 | US15/410620 |
公开(公告)号 | US20170133240A1 |
IPC 分类号 | H01L21/48 | H01L23/373 | H01S5/024 | H01L23/367 |
专利代理人 | - |
代理机构 | - |
文献类型 | 专利 |
条目标识符 | http://ir.opt.ac.cn/handle/181661/54758 |
专题 | 半导体激光器专利数据库 |
作者单位 | KIM, GERALD HO |
推荐引用方式 GB/T 7714 | KIM, GERALD HO. Silicon Heat-Dissipation Package For Compact Electronic Devices. US20170133240A1[P]. 2017-05-11. |
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