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基于sCMOS-CIS2521F芯片的成像关键技术研究
王艳
学位类型硕士
导师陈小来
2020-05-23
学位授予单位中国科学院大学
学位授予地点北京
学位名称工程硕士
关键词sCMOS FPGA DDR 图像处理 图像质量评估
摘要

随着低噪实时图像处理系统对图像的质量以及处理器的运算速度的要求越来越高,如何在提高处理器运算速度的同时获得高品质的图像成为低噪成像领域着重研究的内容之一。sCMOS (scientifi -c CMOS)器件因其特殊的生产工艺,使其在继承了传统CMOS器件优点的同时还具有较高的动态范围以及极低的读出噪声等优点,成为了当下成像系统优选探测器之一,另外 FPGA的并行处理特点与可反复配置的灵活使用方式使其成为现代数字图像处理核心器件。因此,以sCMOS为探测器,FPGA为控制单元的低噪成像系统成为了目前相关领域研究的热门课题。

本文以仙童公司生产的sCMOS-CIS2521F为光电转换单元,Xilinx公司的FPGA为主控单元,辅以其他器件搭建的低噪成像系统,对成像中的大容量图像数据缓存以及实时图像数据处理等关键技术进行研究,主要工作内容包含以下几个方面:

  1. 通过对成像系统所涉及到的采集、控制、传输以及显示等技术环节分析,确立sCMOS+FPGA+DDR+CamLink硬件架构作为本文的验证平台。
  2. 完成系统的FPGA软件设计,确立了探测器时序接口+图像数据转换+图像数据存储+图像数据处理+高速图像数据CamLink接口传输的软件结构,并对探测器的两种曝光方式(RollingGlobal),在上电、配置、读出方式等方面进行了研究比对,基于Rolling模式实现了全局曝光,使得系统的成像应用方式不再单一。
  3. 通过对图像传感器数据读出方式进行分析,针对其Global曝光方式设计了一种DDR2+FIFO的大容量图像数据缓存机制,高效完成系统对图像数据高带宽实时读写需求。
  4. 计算并分析了CIS2521F低噪成像系统的噪声及其来源,对相机系统的电路噪声、光子噪声以及信噪比等参数进行了测试,完成了系统的噪声水平评估。
  5. 对图像去噪算法(高斯滤波算法、中值滤波算法、最大值滤波算法、最小值滤波算法以及均值滤波算法)、图像增强算法(拉普拉斯算法和Sobel算法)以及算法的FPGA实现进行了研究,结合本系统的硬件特点对已有算法进行了改进与FPGA实现验证。使用客观图像质量评价方法中的MAEPSNRMSE以及MSSIM等评估指标分别对计算机软件以及FPGA硬件处理完的图像进行了客观图像质量评价,并使用主观图像质量方法对客观评价结果进行了验证。通过主观图像质量评价方法和客观评价方法明确了设计的不足之处并给出了相关的建议。
其他摘要

As low noise real-time image processing system has more and more requirements on image quality and processor operation speed, how to improve the processor operation speed and obtain high quality image has become one of the focuses in the field of low noise imaging. sCMOS scientific (CMOS) devices because of its special production process, in the inherited the advantages of conventional CMOS device also has the high dynamic range and low readout noise etc, and became one of the imaging system optimization detector, in addition the FPGA parallel processing characteristics and can be used repeatedly configuration of flexible way to make it a modern core device of digital image processing. Therefore, the low noise imaging system with sCMOS as detector and FPGA as control unit has become a hot topic in related fields.

In this paper, the sCMOS-CIS2521F produced by XianTong company is used as the photoelectric conversion unit, the FPGA of Xilinx company is the main control unit, supplemented by the low-noise imaging system built by other devices. Research on key technologies such as large-capacity image data caching and real-time image data processing in imaging. The main work includes the following aspects:

  1. sCMOS +FPGA+DDR+CamLink hardware architecture was established as the verification platform of this paper through the analysis of the acquisition, control, transmission, display and other technical links involved in the imaging system.
  2. Completed the FPGA software design of the system, and established the software structure of detector timing sequence interface + image data conversion + image data storage + image data processing + high-speed image data CamLink interface transmission. In addition, the two exposure modes (Rolling and Global) of the detector were studied and compared in terms of power-on, configuration and readout mode. Global exposure is realized based on Rolling mode, which makes the imaging application of the system no longer single.
  3.  Based on the analysis of the data readout mode of the image sensor, a high-capacity image data caching mechanism of DDR2+FIFO is designed for its Global exposure mode, so as to efficiently complete the system's real-time reading and writing requirements for image data with high bandwidth.
  4.  The noise of CIS2521F low-noise imaging system and its sources were calculated and analyzed, the circuit noise, photon noise, signal to noise ratio and other parameters of the camera system are tested, and the noise level of the system is evaluated.
  5. The image denoising algorithm (gaussian filtering algorithm, median filtering algorithm, maximum filtering algorithm, minimum filtering algorithm and mean filtering algorithm), image enhancement algorithm (Laplace algorithm and Sobel algorithm) and FPGA implementation of the algorithm were studied, combining with the hardware characteristics of the system, the existing algorithm is improved and FPGA implementation is verified. MAE, PSNR, MSE, MSSIM and other evaluation indexes in the objective image quality evaluation method were used to evaluate the image quality processed by computer software and FPGA hardware, and the subjective image quality method is used to verify the objective evaluation results. Through the subjective image quality evaluation method and the objective evaluation method, the deficiencies of the design are clarified and the relevant Suggestions are given.
学科领域电子、通信与自动控制技术
语种中文
第二导师胡炳樑
文献类型学位论文
条目标识符http://ir.opt.ac.cn/handle/181661/93477
专题研究生部
推荐引用方式
GB/T 7714
王艳. 基于sCMOS-CIS2521F芯片的成像关键技术研究[D]. 北京. 中国科学院大学,2020.
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