Via for Semiconductor Device Connection and Methods of Forming the Same

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	Via for Semiconductor Device Connection and Methods of Forming the Same
其他题名	Via for Semiconductor Device Connection and Methods of Forming the Same
	YU, CHEN-HUA; SU, AN-JHIH; WU, CHI-HSI; CHIOU, WEN-CHIH; WU, TSANG-JIUH; YEH, DER-CHYANG; YEH, MING SHIH
	2019-08-15
专利权人	TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
公开日期	2019-08-15
授权国家	美国
专利类型	发明申请
摘要	A method for forming a via in a semiconductor device and a semiconductor device including the via are disclosed. In an embodiment, the method may include bonding a first terminal and a second terminal of a first substrate to a third terminal and a fourth terminal of a second substrate; separating the first substrate to form a first component device and a second component device; forming a gap fill material over the first component device, the second component device, and the second substrate; forming a conductive via extending from a top surface of the gap fill material to a fifth terminal of the second substrate; and forming a top terminal over a top surface of the first component device, the top terminal connecting the first component device to the fifth terminal of the second substrate through the conductive via.
其他摘要	公开了一种用于在半导体器件中形成通孔的方法和包括该通孔的半导体器件。在一个实施例中，该方法可以包括将第一衬底的第一端子和第二端子接合到第二衬底的第三端子和第四端子;分离第一基板以形成第一组件装置和第二组件装置;在第一组件装置，第二组件装置和第二基板上形成间隙填充材料;形成从间隙填充材料的顶表面延伸到第二基板的第五端子的导电通孔;在顶部端子上方形成顶部端子，顶部端子通过导电通孔将第一部件装置连接到第二基板的第五端子。
主权项	A method comprising: bonding a first terminal and a second terminal of a first substrate to a third terminal and a fourth terminal of a second substrate; separating the first substrate to form a first component device and a second component device; forming a gap fill material over the first component device, the second component device, and the second substrate; forming a conductive via extending from a top surface of the gap fill material to a fifth terminal of the second substrate; and forming a top terminal over a top surface of the first component device, the top terminal connecting the first component device to the fifth terminal of the second substrate through the conductive via.
申请日期	2018-09-04
专利号	US20190252312A1
专利状态	申请中
申请号	US16/121360
公开（公告）号	US20190252312A1
IPC 分类号	H01L23/522 \| H01L23/00 \| H01L21/768 \| H01L21/033 \| H01L21/311 \| H01L21/3105 \| H01L21/683 \| H01L21/02 \| H01L23/528 \| H01L33/00 \| H01L33/62 \| H01L21/56 \| H01L25/075 \| H01L33/38
专利代理人	-
代理机构	-
文献类型	专利
条目标识符	http://ir.opt.ac.cn/handle/181661/54918
专题	半导体激光器专利数据库
作者单位	TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
推荐引用方式 GB/T 7714	YU, CHEN-HUA,SU, AN-JHIH,WU, CHI-HSI,et al. Via for Semiconductor Device Connection and Methods of Forming the Same. US20190252312A1[P]. 2019-08-15.