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Method and Apparatus for Optical Waveguide-to-Semiconductor Coupling and Optical Vias for Monolithically Integrated Electronic and Photonic Circuits
其他题名Method and Apparatus for Optical Waveguide-to-Semiconductor Coupling and Optical Vias for Monolithically Integrated Electronic and Photonic Circuits
POPOVIC, MILOS
2014-07-10
专利权人MASSACHUSETTS INSTITUTE OF TECHNOLOGY
公开日期2014-07-10
授权国家美国
专利类型发明申请
摘要An optical coupler has a waveguide coupled to a grating of multiple scattering units, each scattering unit having a first scattering element formed of a shape in a polysilicon gate layer and a second scattering element formed of a shape in a body silicon layer of a metal-oxide-semiconductor (MOS) integrated circuit (IC). The couplers may be used in a system having a coupler on each of a first and second IC, infrared light being formed into a beam passing between the couplers. Vias may be interposed in third ICs between the first and second ICs. The couplers may be configured with nonuniform width of scattering elements to produce Gaussian or focused beams.
其他摘要光学耦合器具有耦合到多个散射单元的光栅的波导,每个散射单元具有由多晶硅栅极层中的形状形成的第一散射元件和由金属的体硅层中的形状形成的第二散射元件。氧化物半导体(MOS)集成电路(IC)。耦合器可用于在第一和第二IC中的每一个上具有耦合器的系统中,红外光形成为在耦合器之间通过的光束。通孔可以插入第一和第二IC之间的第三IC中。耦合器可配置有不均匀宽度的散射元件以产生高斯或聚焦光束。
主权项An optical coupler comprising: a waveguide coupled to a grating comprising a plurality of scattering units, each scattering unit further comprising a first scattering element formed of a shape in a polysilicon gate layer and a second scattering element formed of a shape in an active layer of a metal-oxide-semiconductor (MOS) integrated circuit, the polysilicon gate layer being formed in a layer also used for gates of MOS transistors of the integrated circuit.
申请日期2014-01-10
专利号US20140193115A1
专利状态申请中
申请号US14/152898
公开(公告)号US20140193115A1
IPC 分类号G02B6/34
专利代理人-
代理机构-
文献类型专利
条目标识符http://ir.opt.ac.cn/handle/181661/54484
专题半导体激光器专利数据库
作者单位MASSACHUSETTS INSTITUTE OF TECHNOLOGY
推荐引用方式
GB/T 7714
POPOVIC, MILOS. Method and Apparatus for Optical Waveguide-to-Semiconductor Coupling and Optical Vias for Monolithically Integrated Electronic and Photonic Circuits. US20140193115A1[P]. 2014-07-10.
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