Xi'an Institute of Optics and Precision Mechanics,CAS
Chip on submount carrier fixture | |
其他题名 | Chip on submount carrier fixture |
LIM, CHEE KHENG; HODGES, HOLLAND | |
2016-08-25 | |
专利权人 | WESTERN DIGITAL TECHNOLOGIES, INC. |
公开日期 | 2016-08-25 |
授权国家 | 美国 |
专利类型 | 发明申请 |
摘要 | Heat assisted magnetic recording uses a laser diode (LD) to provide energy during the writing process. The LD is bonded on a submount chip which is referred to as the Chip-On-Submount-Assembly (COSA). COSA devices undergo burn-in and testing in COSA burn-in fixtures, which include a first non-conductive layer having through holes and a second conductive layer having first openings. The second conductive layer is disposed over the first non-conductive layer with each of the first openings overlaying one of the through holes. COSA burn-in fixtures also include a third non-conductive layer having second openings that are larger than the first openings. The third non-conductive layer is disposed over the second conductive layer with each of the second openings overlaying one of the first openings, which forms pockets with a seat on the conductive layer for disposing the LD with one electrode in contact with the conductive layer. |
其他摘要 | 热辅助磁记录使用激光二极管(LD)在写入过程中提供能量。 LD连接在子安装芯片上,该芯片被称为子安装芯片组件(COSA)。 COSA器件在COSA老化固定装置中进行老化和测试,该装置包括具有通孔的第一非导电层和具有第一开口的第二导电层。第二导电层设置在第一非导电层上,每个第一开口覆盖其中一个通孔。 COSA老化固定装置还包括第三非导电层,该第三非导电层具有比第一开口大的第二开口。第三非导电层设置在第二导电层上,每个第二开口覆盖第一开口中的一个,其形成具有位于导电层上的座的凹穴,用于设置LD,其中一个电极与导电层接触。 |
主权项 | A system comprising: a plurality of laser diode submount assemblies, each laser diode submount assembly comprising a laser diode (LD) with a first contact disposed on a submount with a second contact;a holder that holds the plurality of laser diode submount assemblies, comprising: a first non-conductive layer having a plurality of through holes; a second conductive layer having a plurality of first openings, the second conductive layer being disposed over the first non-conductive layer; a third non-conductive layer having a plurality of second openings that are larger than the plurality of first openings, the third non-conductive layer being disposed over the second conductive layer with each of the plurality of second openings overlaying one of the plurality of first openings; and wherein the plurality of first openings and the plurality of second openings form a plurality of pockets with a seat on the conductive layer, the plurality of submount assemblies being disposed within the plurality of pockets with the second contact of the submount making electrical contact with the second conductive layer at the seat and each LD being disposed within one of the first openings. |
申请日期 | 2016-05-04 |
专利号 | US20160248221A1 |
专利状态 | 失效 |
申请号 | US15/146183 |
公开(公告)号 | US20160248221A1 |
IPC 分类号 | H01S5/022 | H01S5/00 | G11B5/012 |
专利代理人 | - |
代理机构 | - |
文献类型 | 专利 |
条目标识符 | http://ir.opt.ac.cn/handle/181661/51741 |
专题 | 半导体激光器专利数据库 |
作者单位 | WESTERN DIGITAL TECHNOLOGIES, INC. |
推荐引用方式 GB/T 7714 | LIM, CHEE KHENG,HODGES, HOLLAND. Chip on submount carrier fixture. US20160248221A1[P]. 2016-08-25. |
条目包含的文件 | 条目无相关文件。 |
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