Hardware design of video compression system based on TMS320DM368 | |
He, Bian; Lei, Yang; Jiawen, Liao; Jia, Feng; Hao, Wang; Hua, Wang | |
2017 | |
会议名称 | 9th International Conference on Intelligent Human-Machine Systems and Cybernetics, IHMSC 2017 |
会议录名称 | Proceedings - 9th International Conference on Intelligent Human-Machine Systems and Cybernetics, IHMSC 2017 |
卷号 | 2 |
页码 | 294-297 |
会议日期 | 2017-08-26 |
会议地点 | Hangzhou, Zhejiang, China |
出版者 | Institute of Electrical and Electronics Engineers Inc. |
产权排序 | 1 |
摘要 | HD video data is visible in the real-Time compression processing is one of the key technologies, The current video compression codec hardware platform mainly includes: ASIC, DSP and SoC. These three kinds of SOC chips have become the mainstream of the codec chip market because of their low cost, low power consumption and high integration. According to Da Vinci of TI processor TMS320DM368 as the core architecture, The hardware system of high definition video compression processing based on embedded technology is designed, which includes video input ISIF interface module, communication module, core processor module, peripheral circuit module and power module. This system supports 1080P30 HD video capture hardware frame, H.264 encoding compression and local storage, can be widely used in industrial control, medical, aerospace and other industries, has important application value in engineering. © 2017 IEEE. |
作者部门 | 瞬态光学技术国家重点实验室 |
DOI | 10.1109/IHMSC.2017.178 |
收录类别 | EI ; ISTP |
ISBN号 | 9781538630228 |
语种 | 英语 |
引用统计 | |
文献类型 | 会议论文 |
条目标识符 | http://ir.opt.ac.cn/handle/181661/29409 |
专题 | 瞬态光学研究室 |
作者单位 | Xi'an Institute of Optics and Precision Mechanics, Chinese Academy of Sciences, Xi'an, China |
推荐引用方式 GB/T 7714 | He, Bian,Lei, Yang,Jiawen, Liao,et al. Hardware design of video compression system based on TMS320DM368[C]:Institute of Electrical and Electronics Engineers Inc.,2017:294-297. |
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文件名称/大小 | 文献类型 | 版本类型 | 开放类型 | 使用许可 | ||
Hardware design of v(571KB) | 会议论文 | 限制开放 | CC BY-NC-SA | 请求全文 |
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