空间光学技术研究室知识库

Development of the next generation star sensor is tending to miniaturization, low cost and low power consumption, so the imaging system based on FPGA in the past could not meet its developing requirements. A novel design of digital imaging system is discussed in this paper. Combined with the MT9P031 CMOS image sensor's timing sequence and working mode, the sensor driving circuit and image data memory circuit were implemented with the main control unit TMS320DM3730. In order to make the hardware system has the advantage of small size and light weight, the hardware adopted miniaturization design. The software simulation and experimental results demonstrated that the designed imaging system was reasonable, the function of tunable integration time and selectable window readout modes were realized. The communication with computer was exact. The system has the advantage of the powerful image processing,small-size, compact, stable, reliable and low power consumption. The whole system volume is 40 mm ∗40 mm ∗40mm,the system weight is 105g, the system power consumption is lower than 1w. This design provided a feasible solution for the realization of the subminiature star sensor's imaging system. © 2017 SPIE.